OpenSPARC
- Main Sun pages on project: links, articles, documents, FAQ, contest.
- http://www.sun.com/processors/opensparc/

OpenSPARC T1 FPGA Work
- Processor implementation for field programmable gate arrays. SunSource.net.
- http://fpga.sunsource.net/

S1 Core
- This core (codename Sirocco) is one 64-bit core from the OpenSPARC T1 8 core processor (codename Niagara), plus a Wishbone bridge, reset controller, and basic interrupt controller, to make it easy for engineers to integrate the design. SunSource.net.
- http://s1.sunsource.net/

OpenSPARC T1
- Open source version of UltraSPARC T1 processor, with CoolThreads technology; high throughput, low power, for high performance per watt; 32 simultaneous processing threads, uses about as much power as a light bulb. SunSource.net.
- http://opensparc-t1.sunsource.net/

Sun Extends Community Source Licensing to Chip Architectures
- Sun Microsystems announces: for research uses, it extends its new Community Source Licensing model to picoJava and SPARC architectures; the first time a company made major microprocessor intellectual property available via open licensing.
- http://www.sun.com/smi/Press/sunflash/9903/sunflash.990302.4.html

Sun Releases Complete Chip Design for Free
- Download full MicroSPARC-IIep design for free under terms of Sun Community Source License. [CNET News.com]
- http://news.com.com/2100-1040-215335.html

Sun Offers Open-Source SPARC
- Brief story and analysis; by Craig Matsumoto; TechWeb.
- http://www.techweb.com/wire/story/TWB19990914S0015/

Free SPARC VHDL Model Available
- Announcement of open source LEON SPARC architecture; Google Groups.
- http://groups.google.com/group/comp.arch.fpga/msg/e9000f25e6a53c58

Simply RISC
- Designs and supports open-source RISC processors, systems, peripherals; sells S1 Core, a 64-bit Wishbone-compliant CPU Core based on reduced Sun Microsystems OpenSPARC T1 microprocessor. Catania, Italy; Bristol, UK.
- http://www.srisc.com/

LEON2FT Notes
- Functional SPARC compatible processor core. Fault tolerant version of LEON2, derived from LEON-1 integer unit, implemented as highly configurable, synthesizable VHDL model. Runs on Altera, Mietec, Temic MG2, Xilinx. Designed for outer space uses. Open sou
- http://microelectronics.esa.int/core/ipdoc/leon2ft_notes.txt

Gaisler Research AB
- Provides IP cores, supporting development tools for embedded processors based on SPARC architecture. Key product: LEON synthesizable processor model, full development environment, and library of IP cores, GRLIB. Göteborg, Sweden.
- http://www.gaisler.com/cms4_5_3/