Reduced Instruction Set Computer - Brief, very clear definition, with links to related issues and processors. [FOLDOC] - http://foldoc.org/index.cgi?Reduced+Instruction+Set+Computer
XAP Processors for ASIC and FPGA - Designs 16- and 32-bit processor cores to embed in application specific integrated circuits, ASICs; coded in Verilog language, provided as soft IP (Intellectual Property) cores. Cambridge Consultants Ltd. - http://www.cambridgeconsultants.com/prop_q_sil_XAP_process.shtml
High Performance Computing: CISC vs. RISC - Brief introduction, gives general idea of what CISC and RISC are. - http://www.ccs.neu.edu/groups/honors-program/freshsem/19951996/utopia/risc.html
What is RISC? - Defines term, lists other Webpages to learn more. Webopedia. - http://www.webopedia.com/term/r/risc.html
John Mashey on RISC/CISC - From comp.arch debates, in one text document for easier reading, original text and formats preserved, mostly. - http://userpages.umbc.edu/~vijay/mashey.on.risc.html
RISC Architecture - Sophomore college project. Basic clear explanations of: What is RISC, MIPS processors, Pipelining, RISC vs. CISC, some recent developments, readings. - http://cse.stanford.edu/class/sophomore-college/projects-00/risc/
Beyond RISC: The Post-RISC Architecture - Today's RISC processors are so far from RISC roots that they are no longer truly RISC. [Michigan State University, Department of Computer Science] - http://www.cse.msu.edu/~enbody/postrisc/postrisc2.htm
RISC vs. CISC: The Post-RISC Era - Detailed, balanced, historical analysis. [Ars Technica] - http://arstechnica.com/cpu/4q99/risc-cisc/rvc-1.html
Hyperstone Electronics GmbH - RISC/DSP processors, flash memory controllers and cards (and compact cards), ASIC design, IP hardware, biometric devices, digital still cameras. - http://www.hyperstone-electronics.com/
RISC vs. CISC - Document based on John Mashey (SGI) compilation of comp.arch debates, in one HTML document for easier reading, more so tables; original text and formats preserved where possible. - http://stromeko.synth.net/comp_arch/RISC_vs_CISC.html